Investigation of ways to synthesize concurrent error-detection circuits based on boolean signals correction using uniform separable codes

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Abstract

The features of the synthesis of concurrent error-detection circuit based on the Boolean signals correction using uniform separable codes are investigated. Three types of structures are considered: type I – structure with correction of part of the signals from the outputs of the diagnostic object forming the check symbols of a given code in the concurrent error-detection circuit; type II – structure with correction of part of the signals from the outputs of the diagnostic object forming the data symbols of a given code in the concurrent error-detection circuit; type III – structure with signal correction from all outputs of the diagnostic object. For structures of all types, formulas are given for determining the number of ways to synthesize concurrent error-detection circuit based on the Boolean signals correction using a given code. New properties of structures have been established that characterize the features of the growth in the number of methods for synthesizing concurrent error-detection circuit with an increase in the number of outputs forming data and check symbols. Patterns have been found that allow in practice to estimate the number of ways to synthesize concurrent error-detection circuit based on the Boolean signals correction using uniform separable codes in order to select the best one according to specified criteria. Examples are given to demonstrate the effectiveness of using the found patterns.

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About the authors

D. V. Efanov

Peter the Great Saint Petersburg Polytechnic University; Russian University of Transport; Tashkent State Transport University; «Transport and Construction Safety» LLC

Author for correspondence.
Email: TrES-4b@yandex.ru
Russian Federation, St. Petersburg; Moscow; Uzbekistan, Tashkent; St. Petersburg

E. I. Yelina

Peter the Great Saint Petersburg Polytechnic University

Email: eseniya-elina@mail.ru
Russian Federation, St. Petersburg

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Supplementary files

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2. Formula 4

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3. Fig. 1. Cascades of transformation elements in the structures of the organization of the SVC based on the LKS using (m, k)-codes.

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4. Fig. 2. Given devices F1(x) and F2(x).

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5. Fig. 3. The principle of organizing control of calculations for the example under consideration.

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